Struct Pwm 

pub struct Pwm<TIMERX> { /* private fields */ }

A timer running as the period behind one or more PWM channels.

Owns the counter the channels compare against: channels carry their own duty, the frequency they all share is set here.

Implementations

impl<TIMERX: Instance> Pwm<TIMERX>

pub fn channel<PIN, const C: u8>( &mut self, pin: PIN, ) -> PwmChannel<TIMERX, PIN, C>

where PIN: ChannelPin<TIMERX, C>, TIMERX: PwmOps<C>,

Configures one channel of this timer and hands it out on the given pin.

Which channel it is follows from the pin — the silicon routes each pin to one channel of one timer. The channel comes out configured but not enabled, with no duty set, and holds the pin until release_channel takes it back.

Several pins can reach one channel (TIMER2 channel 0 answers on PA6 and PB4), and handing over both yields two channels writing one compare register: same signal on both pins, and the last duty written wins.

pub fn release_channel<PIN, const C: u8>( &mut self, channel: PwmChannel<TIMERX, PIN, C>, ) -> PIN

where PIN: ChannelPin<TIMERX, C>, TIMERX: PwmOps<C>,

Takes a channel back, disabled and no longer listening, and returns its pin.

pub fn listen(&mut self, event: Event)

Lets event raise an interrupt.

The counter’s own event, shared by every channel: Update marks the period boundary, where the duties written since the last one take effect. Channels raise their own, through PwmChannel::listen. Unmasking the line in the NVIC is the caller’s.

pub fn unlisten(&mut self, event: Event)

Stops event from raising an interrupt. Leaves the NVIC alone.

pub fn is_listening(&self, event: Event) -> bool

Whether event reaches the NVIC.

pub fn is_pending(&self, event: Event) -> bool

Whether the flag event raises is standing.

pub fn clear_interrupt(&mut self, event: Event)

Clears the flag event raised, which hardware never does on its own.

pub fn set_period(&mut self, psc: u16, car: u16)

Changes the period without disturbing the running counter.

Channels keep the duty they were given in ticks, so a new reload moves what fraction that is: half of a thousand ticks is all of five hundred. Set the duties again, or scale them by the new max_duty. The prescaler reaches the counter at the next update event, so the cycle in flight runs on the old one.

pub fn set_period_interval<const NOM: u64, const DENOM: u64>( &mut self, interval: Duration<u32, NOM, DENOM>, )

Changes the period, taking it as a duration.

Splits it like into_pwm_interval.

pub fn into_timer(self) -> Timer<TIMERX>

Halts the counter, stops listening and takes the timer back out of PWM duty.

Panics

If a channel is still out — hand each one back through release_channel first.

pub fn release(self, rcu: &mut Rcu) -> TIMERX

Halts the counter and returns the peripheral with its clock stopped, skipping the stopped form.

Panics

As for into_timer.

pub fn try_release(self, rcu: &mut Rcu) -> Result<TIMERX, Self>

Same as release, but hands self back instead of panicking.

Errors

Returns self untouched while a channel is still out.

impl<TIMERX> Pwm<TIMERX>

where TIMERX: PrimaryOutput,

pub fn enable_output(&mut self)

Lets the channels reach their pins.

Timers with a CCHP register keep their outputs behind this switch, and it starts off — such a channel stays silent however it is configured until this is called. Timers without the register need nothing.

pub fn disable_output(&mut self)

Cuts every channel off from its pin at once, keeping them configured.