Struct Usart 

pub struct Usart<USARTX, TX, RX, WORD = Byte> { /* private fields */ }

A configured USART, owning the peripheral and both pins.

WORD is the word width: write_byte/read_byte live on Usart<.., Byte>, write_word/read_word on Usart<.., Word>. Defaults to Byte.

Implementations

impl<USARTX, TX, RX, WORD> Usart<USARTX, TX, RX, WORD>

where USARTX: Deref<Target = RegisterBlock>,

pub fn take_error(&mut self) -> Option<Error>

Returns the pending receive error, if any, and clears it.

The acknowledge for Event::Error and Event::ParityError: those flags are what hold the interrupt request up, and on the DMA receive path nothing else drains them, so a handler that skips this re-enters forever. One error per call — with two pending, the second survives for the next. Also drains RDATA, the frame having been lost or corrupted either way.

pub fn read_ready(&self) -> bool

Returns whether a received word is waiting to be read.

Only guarantees that the next single read will not block; a buffered read may still block once it has taken what was already there.

pub fn write_ready(&self) -> bool

Returns whether the transmit buffer can accept a word right now.

Only guarantees that the next single write will not block.

pub fn flush_ready(&self) -> bool

Returns whether everything handed to the peripheral has left the wire.

TC, the flag flush waits for, so this is the same question asked without blocking.

pub fn flush(&self)

Blocks until everything handed to the peripheral has left the wire.

Waits for TC, not TBE — the latter only says TDATA reached the shift register while the byte is still being clocked out. Call this before cutting power to a transceiver or sleeping. Cannot fail.

pub fn listen(&mut self, event: Event)

Lets event raise an interrupt. Unmasking the line in the NVIC is the caller’s.

No event needs a separate clear — each is acknowledged by the same call a handler makes to do its work: Rbne by read_byte, Tbe by write_byte, both error events by take_error. Tbe is set whenever nothing is queued, so a handler that listens for it must call unlisten once it has nothing left to send, or it re-enters at once.

pub fn unlisten(&mut self, event: Event)

Stops event from raising an interrupt. Leaves the NVIC alone.

pub fn is_listening(&self, event: Event) -> bool

Whether event currently raises an interrupt.

Every event here shares one NVIC line, so a handler needs this to tell which of them woke it: the flag alone is not enough, since Tbe is set at idle regardless of whether it is being listened for.

pub fn release(self, rcu: &mut Rcu) -> (USARTX, TX, RX)

where USARTX: Enable,

Waits for the last frame to leave the wire, then returns the peripheral and both pins, disabled, with its interrupts off and its clock stopped.

impl<USARTX, TX, RX> Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock>,

pub fn write_byte(&mut self, byte: u8)

Sends one byte, blocking until the transmit buffer can accept it.

Returning does not mean the byte has left the wire — for that, see flush.

pub fn write_bytes(&mut self, buf: &[u8])

Sends every byte of buf, blocking until the last one is handed over.

Returning does not mean the buffer has left the wire — for that see flush. Cannot fail.

pub fn read_byte(&mut self) -> Result<u8, Error>

Receives one byte, blocking until one arrives.

Errors

The line error flagged on the frame, which is consumed and reported instead of the data, so a damaged byte is never mistaken for a good one.

pub fn read_bytes(&mut self, buf: &mut [u8]) -> Result<usize, Error>

Receives into buf and returns how many bytes were placed there.

Blocks until at least one byte arrives, then takes whatever else is waiting and returns — it does not wait for buf to fill, which would deadlock against a peer waiting for its answer. Returns 0 only for an empty buf.

Errors

A line error ends the call at once, losing the bytes copied before it: the count is not reported alongside an error.

impl<USARTX, TX, RX> Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock> + Enable + Reset + BusClocks, TX: TxPin<USARTX>, RX: RxPin<USARTX>,

pub fn new( rcu: &mut Rcu, usart: USARTX, tx_pin: TX, rx_pin: RX, config: UsartConfig, ) -> Self

Enables the peripheral’s clock, resets it and configures 8-bit words.

The pins must already be in this USART’s alternate function; release hands them back.

Panics

If the baud rate is zero, or too low to reach from the USART’s clock. Checked before the peripheral is touched.

impl<USARTX, TX, RX> Usart<USARTX, TX, RX, Word>

where USARTX: Deref<Target = RegisterBlock>,

pub fn write_word(&mut self, word: u16)

Sends one 9-bit word, blocking until the transmit buffer can accept it.

Bits above the ninth are discarded.

pub fn write_words(&mut self, buf: &[u16])

Sends every word of buf, blocking until the last one is handed over.

Returning does not mean the buffer has left the wire — for that see flush. Cannot fail.

pub fn read_word(&mut self) -> Result<u16, Error>

Receives one 9-bit word, blocking until one arrives.

Errors

As for read_byte.

pub fn read_words(&mut self, buf: &mut [u16]) -> Result<usize, Error>

Receives into buf and returns how many words were placed there.

Same blocking rule as read_bytes: waits for the first word, then takes only what is already waiting.

Errors

As for read_bytes.

impl<USARTX, TX, RX> Usart<USARTX, TX, RX, Word>

where USARTX: Deref<Target = RegisterBlock> + Enable + Reset + BusClocks, TX: TxPin<USARTX>, RX: RxPin<USARTX>,

pub fn new_word( rcu: &mut Rcu, usart: USARTX, tx_pin: TX, rx_pin: RX, config: UsartConfig9, ) -> Self

Same as new, but configures raw 9-bit words with no parity.

All nine bits carry data, so there is no frame format to choose and the peripheral moves u16 rather than u8.

Panics

As for new.

Trait Implementations

impl<TX, RX> DmaDst<1> for Usart<Usart0, TX, RX, Byte>

impl<TX, RX> DmaDst<1> for Usart<Usart0, TX, RX, Word>

impl<TX, RX> DmaDst<3> for Usart<Usart1, TX, RX, Byte>

impl<TX, RX> DmaDst<3> for Usart<Usart1, TX, RX, Word>

impl<TX, RX> DmaPeriph<1> for Usart<Usart0, TX, RX, Byte>

type Word = u8

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaPeriph<1> for Usart<Usart0, TX, RX, Word>

type Word = u16

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaPeriph<2> for Usart<Usart0, TX, RX, Byte>

type Word = u8

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaPeriph<2> for Usart<Usart0, TX, RX, Word>

type Word = u16

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaPeriph<3> for Usart<Usart1, TX, RX, Byte>

type Word = u8

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaPeriph<3> for Usart<Usart1, TX, RX, Word>

type Word = u16

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaPeriph<4> for Usart<Usart1, TX, RX, Byte>

type Word = u8

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaPeriph<4> for Usart<Usart1, TX, RX, Word>

type Word = u16

The word type this peripheral transfers, fixing PWIDTH/MWIDTH.

fn addr(&self) -> u32

Address of the peripheral’s data register.

fn enable_dma(&mut self)

Lets the peripheral raise DMA requests on its channel.

fn disable_dma(&mut self)

Stops the peripheral raising DMA requests.

impl<TX, RX> DmaSrc<2> for Usart<Usart0, TX, RX, Byte>

impl<TX, RX> DmaSrc<2> for Usart<Usart0, TX, RX, Word>

impl<TX, RX> DmaSrc<4> for Usart<Usart1, TX, RX, Byte>

impl<TX, RX> DmaSrc<4> for Usart<Usart1, TX, RX, Word>

impl<USARTX, TX, RX, WORD> ErrorType for Usart<USARTX, TX, RX, WORD>

type Error = Error

Error type

impl<USARTX, TX, RX, WORD> ErrorType for Usart<USARTX, TX, RX, WORD>

type Error = Error

Error type of all the IO operations on this type.

impl<USARTX, TX, RX> Read for Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock>,

fn read(&mut self) -> Result<u8, Self::Error>

Reads a single word from the serial interface

impl<USARTX, TX, RX> Read for Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock>,

fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error>

Read some bytes from this source into the specified buffer, returning how many bytes were read.

fn read_exact( &mut self, buf: &mut [u8], ) -> Result<(), ReadExactError<Self::Error>>

Read the exact number of bytes required to fill buf.

impl<USARTX, TX, RX> ReadReady for Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock>,

fn read_ready(&mut self) -> Result<bool, Self::Error>

Get whether the reader is ready for immediately reading.

impl<USARTX, TX, RX> Write for Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock>,

fn write(&mut self, byte: u8) -> Result<(), Self::Error>

Writes a single word to the serial interface.

fn flush(&mut self) -> Result<(), Self::Error>

Ensures that none of the previously written words are still buffered.

impl<USARTX, TX, RX> Write for Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock>,

fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error>

Write a buffer into this writer, returning how many bytes were written.

fn flush(&mut self) -> Result<(), Self::Error>

Flush this output stream, blocking until all intermediately buffered contents reach their destination.

fn write_all(&mut self, buf: &[u8]) -> Result<(), Self::Error>

Write an entire buffer into this writer.

fn write_fmt( &mut self, fmt: Arguments<'_>, ) -> Result<(), WriteFmtError<Self::Error>>

Write a formatted string into this writer, returning any error encountered.

impl<USARTX, TX, RX> WriteReady for Usart<USARTX, TX, RX, Byte>

where USARTX: Deref<Target = RegisterBlock>,

fn write_ready(&mut self) -> Result<bool, Self::Error>

Get whether the writer is ready for immediately writing.