Module spi 

SPI master.

Master, full-duplex, with software NSS (chip select is an ordinary GPIO the caller toggles). Frames are 8 or 16 bits wide, selected by a typestate parameter.

Every operation is a simultaneous exchange — a word leaves on MOSI while another arrives on MISO — so SpiBus::read sends zeros and SpiBus::write discards what comes back.

let sck = parts.pa5.into_alternate::<0>();
let miso = parts.pa6.into_alternate::<0>();
let mosi = parts.pa7.into_alternate::<0>();
let mut spi = Spi::new(&mut rcu, dp.spi0, sck, miso, mosi, SpiConfig::new(SpiPsc::Div8));

Modules

fill

Named idle levels for the side of an exchange that carries no data.

Structs

Byte

Word-width marker: 8-bit frames (Spi::transfer_byte, SpiBus<u8>).

Spi

A configured SPI master, owning the peripheral and its three pins.

SpiConfig

Bus configuration passed to Spi::new / Spi::new_word.

Word

Word-width marker: 16-bit frames (Spi::transfer_word, SpiBus<u16>).

Enums

BitOrder

Order in which the bits of a word are shifted onto the wire.

Error

An error the peripheral flagged in STAT.

Event

An SPI event that can raise an interrupt.

SpiPsc

SCK prescaler: divides pclk down to the serial clock.

Traits

Instance

A peripheral that Spi can drive.

MisoPin

Marks a pin usable as MISO for SPI, in the right alternate function.

MosiPin

Marks a pin usable as MOSI for SPI, in the right alternate function.

SckPin

Marks a pin usable as SCK for SPI, in the right alternate function.