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Module exti

Module exti 

Source
Expand description

External interrupts and events.

GPIO has no interrupt of its own: an edge on a pin becomes one only here. The detector is asynchronous, so it works with the system clock stopped, which is what makes EXTI the way out of deep sleep and standby.

ExtiExt::split hands out one token per line. Lines 0 to 15 arrive without a source and reach the rest of their API by being given a pin, which they then own; the internal lines have their source wired in silicon.

The pin lines share three vectors — EXTI0_1, EXTI2_3, EXTI4_15 — so a handler serves several lines and has to ask which of them is pending. The internal lines have no EXTI vector at all: each arrives on the vector of the peripheral behind it, LVD on its own and the rest on RTC, ADC/CMP and USART0.

The two outputs are not symmetric in what they leave behind: only the interrupt path latches PD, so a line used for events alone has no flag to clear after WFE.

ⓘ
let mut syscfg = dp.syscfg.constrain(&mut rcu);
let pa0 = dp.gpioa.split(&mut rcu).pa0.into_input();
let mut line = dp.exti.split().line0.source(&mut syscfg, pa0);
line.edge(EdgeTrigger::Rising);
line.listen();
unsafe { NVIC::unmask(pac::Interrupt::EXTI0_1) };

Structs§

ExtiLine
One EXTI line, identified by its number at the type level, holding whatever drives it.
ExtiLines
The EXTI lines, as handed out by ExtiExt::split.
InternalSrc
A line whose source is wired in silicon and needs no pin.
PinSrc
A line that has no source yet, as ExtiExt::split hands it out.

Enums§

EdgeTrigger
Which edges on the source raise the line.

Traits§

ExtiConfigured
Marks a line whose source is settled, which is what the rest of the line’s API hangs off.
ExtiExt
Splits the EXTI peripheral into its individual lines.
ExtiPin
Marks a pin as a source line N can be pointed at, and carries the EXTISS code that points it there.