Module dma 

Direct memory access: five independent channels moving data without the core.

DmaExt::split consumes the peripheral and hands out one Channel per hardware channel:

let channels = dp.dma.split(&mut rcu);
let transfer = channels.ch1.write_to(usart, b"hello", Prio::Low);
let (ch1, usart, _) = transfer.wait();

Structs

Channel

One DMA channel, identified by its number at the type level.

Channels

The DMA channels, as handed out by DmaExt::split.

Transfer

A DMA transfer in progress, started by Channel::write_to or read_from.

Enums

Prio

Channel priority when several channels contend for the bus.

Width

Width of one transferred unit, selecting PWIDTH/MWIDTH.

Traits

DmaDst

A peripheral channel N can write to, for memory-to-peripheral transfers.

DmaExt

Splits the DMA peripheral into its individual channels.

DmaPeriph

Everything a channel needs from the peripheral on the other end of it.

DmaSrc

A peripheral channel N can read from, for peripheral-to-memory transfers.

DmaWord

A type usable as a DMA transfer unit, mapping to its Width.